Manifold — an Arduino Nano inspired, automotive-grade controller board. Full pin reference for the main harness connector.
Positions
35
Logic level
3.3 V
VIN range
9–40 V
Contact rating
8 A / pin
Sealing
IP67
Temp range
−40 – 125 °C
Top view, mating face. The center row is staggered a half-pitch relative to the outer rows — this is the connector's real pin numbering, not a simplification: pins run left–to–right along the top row (1–12), then the middle row (13–23), then the bottom row (24–35).
Sorted by physical pin number. "MCU pin" is the real NXP S32K144 (64-pin LQFP) silicon pin behind each signal, where applicable.
| Pin | Signal | Direction | Voltage / current | MCU pin | Notes |
|---|---|---|---|---|---|
| 1 | VIN | Power in | 12 V nom (9–40 V) | — | Raw battery input. Upstream of F1 (1 A automotive fuse) and reverse-battery / load-dump protection. |
| 2 | D0 | I/O | 3.3 V | 1 | Shared with onboard UART header J3 (RX). |
| 3 | D1 | I/O | 3.3 V | 2 | Shared with onboard UART header J3 (TX). |
| 4 | D2 | I/O | 3.3 V | 3 | |
| 5 | D3 | I/O | 3.3 V | 4 | |
| 6 | D4 | I/O | 3.3 V | 5 | |
| 7 | D5 | I/O | 3.3 V | 6 | |
| 8 | D6 | I/O | 3.3 V | 13 | |
| 9 | D7 | I/O | 3.3 V | 14 | |
| 10 | D8 | I/O | 3.3 V | 15 | |
| 11 | D9 | I/O | 3.3 V | 16 | |
| 12 | D10 | I/O | 3.3 V | 17 | |
| 13 | D11 | I/O | 3.3 V | 18 | |
| 14 | D12 | I/O | 3.3 V | 19 | |
| 15 | D13 | I/O | 3.3 V | 22 | |
| 16 | +5V | Power out | 5 V, ≤3 A | — | Buck regulator (U2, LMR33630-Q1) output. Not connected to the MCU — peripheral power only. |
| 17 | +3V3 | Power out | 3.3 V, ≤300 mA | — | LDO (U4, TLV733P-Q1) output. Primary MCU supply rail, also exposed here for peripherals. |
| 18 | GND | Ground | 0 V | 10 | |
| 19 | GND | Ground | 0 V | 40 | |
| 20 | RESET | Input | 3.3 V, active-low | 63 | 10 kΩ pull-up to +3V3 (R1) on-board. |
| 21 | AREF | Analog | 3.3 V ref | 9 | Real ADC voltage-reference input (VREFH), not a placeholder pin. |
| 22 | A0 | Analog in | 3.3 V | 20 | Real ADC-capable pin. |
| 23 | A1 | Analog in | 3.3 V | 21 | Real ADC-capable pin. |
| 24 | A2 | Analog in | 3.3 V | 25 | Real ADC-capable pin. |
| 25 | A3 | Analog in | 3.3 V | 26 | Real ADC-capable pin. |
| 26 | A4 | Analog in | 3.3 V | 27 | Real ADC-capable pin. |
| 27 | A5 | Analog in | 3.3 V | 28 | Real ADC-capable pin. |
| 28 | A6 | Analog in | 3.3 V | 29 | Real ADC-capable pin. |
| 29 | A7 | Analog in | 3.3 V | 30 | Real ADC-capable pin. |
| 30 | D14 | I/O | 3.3 V | 23 | |
| 31 | D15 | I/O | 3.3 V | 24 | |
| 32 | D16 | I/O | 3.3 V | 35 | |
| 33 | D17 | I/O | 3.3 V | 36 | |
| 34 | D18 | I/O | 3.3 V | 39 | |
| 35 | D19 | I/O | 3.3 V | 55 |
D0–D19 and A0–A7 are all 3.3 V logic. +5V (pin 16) is a separate, dedicated power pin for peripherals — it does not reach the MCU. Feeding true 5 V logic into any D/A pin risks damaging the MCU.
Both pins double as the onboard UART header's RX/TX. If a peripheral on J1 uses D0/D1 as plain GPIO, it will contend with anything wired to the UART header.
Pin 1 (VIN) passes through a 1 A automotive fuse, reverse-battery ideal-diode protection, and a 33 V TVS clamp before reaching the buck regulator — rated for the 9–40 V transient range typical of a 12 V vehicle electrical system (cold-crank to load-dump).
Every pin labeled A0–A7 and AREF is a genuine ADC-capable / voltage-reference silicon pin on the NXP S32K144, not a relabeled digital pin — analog input here is a real capability, not just a naming convention.